Chip design for submicron VLSI:cmos layout and simulation John P Uyemura
Material type:
TextLanguage: English Publication details: Australia Cengage learning 2006 Description: xvi, 411pISBN: 9788131501955Subject(s): CHIP DESIGN | VLSIDDC classification: 621.38
| Item type | Current library | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
Book
|
NISER LIBRARY | 621.38 UYE-C (Browse shelf(Opens below)) | R (REFERENCE) | 6963 |
Browsing NISER LIBRARY shelves Close shelf browser (Hides shelf browser)
| 621.38 SMI-C Circuits,devices and systems | 621.38 SMI-C Circuits,devices and systems | 621.38 SMI-C Circuits,devices and systems | 621.38 UYE-C Chip design for submicron VLSI:cmos layout and simulation | 621.38 UYE-C CMOS logic circuit design | 621.38 VAS-C Computational electronics: semiclassical and quantum device modeling and simulation | 621.381, 23 Photonic Microresonator Research and Applications |
There are no comments on this title.