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Chip design for submicron VLSI:cmos layout and simulation

Vyemura, J P

Chip design for submicron VLSI:cmos layout and simulation John P Uyemura - Australia Cengage learning 2006 - xvi, 411p.

ISBN: 9788131501955

Subjects--Topical Terms:
CHIP DESIGN
VLSI

Dewey Class. No.: 621.38 / UYE-C

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